Tynana designs on commercially available foundry processes. We have completed two tapeouts in six weeks: an SiN photonic IC on AIM Photonics' PDK and a cryo-CMOS ASIC on GlobalFoundries 22nm FD-SOI (GF45SPCLO). Both processes are open to other quantum-hardware groups; we will gladly co-design with them.
We picked these processes because they are mature, commercially supported, and well-characterized at the operating points our system needs. No exotic stack. No bespoke foundry deal. This matters: it means anyone who licenses these PDKs can replicate, audit, or extend what we are doing.
AIM Photonics' silicon-nitride PDK in Albany, NY hosts our photonic distribution layer — fiber-to-chip couplers, passive AWG demuxes, and on-chip photodetector arrays that translate DWDM-encoded pulses back into electrical signals at 4K.
GF's 22FDX FD-SOI process at the GF45SPCLO node carries our cryo-CMOS ASIC — control logic, current-mode DACs, supply distribution, low-noise amplifiers, and ADC front-ends, all designed to run at deep cryogenic temperatures with bias points re-characterized for sub-4K operation.
If you operate a quantum-hardware program — academic, commercial, or government — we will co-design a control module with you. You bring the qubit spec; we bring the photonic distribution and cryo-CMOS layer.
For teams running their own ASIC or PIC programs, we license selected analog and digital IP blocks — pulse generators, DWDM receivers, feedback DSP — into your design with engineering support to integrate.
For groups who want the whole system without designing it themselves: an 8-channel hybrid bonded module sitting on the cold plate, talking DWDM upstream to a host FPGA you provide.
Tynana owns the design IP — schematics, layouts, firmware, packaging spec — and works directly with foundry partners and OSAT partners to fabricate, bond, and test. You can think of us as the team that turns a co-design conversation into a working module on the cold plate.
For most groups, the first step is a one-hour scoping call where we trade the basics: your qubit modality and channel needs, our process specs and what we have already taped out. From there, we converge on one of the three modes.
Two weeks. Goal: a one-page joint memo on what we would build together and the rough timeline.
4–8 weeks. NDA, mutual IP disclosure, paid engineering hours; deliverable is an engineering scope-of-work for the joint tapeout.
9–18 month engagement, milestones tied to MPW shuttles, packaged module delivered into customer's fridge.
Tynana has completed two MPW tapeouts. We do not have shipped evaluation units, signed customer contracts, or a backlog. Anything described above as a "module" or "license" is a real engineering offering but a forthcoming product. We will say so on this page when that changes.